Weiwei Jiang Email
Lead Design Engineer @ Cadence Design Systems
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Weiwei Jiang Location
- Shanghai, China
Weiwei Jiang Work
- Lead Design Engineer @ (September 2017 - Present)
- Senior Verification Engineer @ (May 2016 - September 2017)
- Design Verification Engineer @ (September 2013 - April 2016)
- Design Verification Engineer @ (March 2012 - August 2013)
Weiwei Jiang Education
- Shanghai Jiao Tong University
Master's degree (Micro electronics)
2009-2012 - Southeast University
Bachelor's degree (Electrical and Electronics Engineering)
2005-2009
Weiwei Jiang Summary
- Weiwei Jiang, based in Shanghai, China, is currently a Lead Design Engineer at Cadence Design Systems. Weiwei Jiang brings experience from previous roles at Broadcom Limited, AMD and Hisilicon. Weiwei Jiang holds a 2009 - 2012 Master's degree in Micro electronics @ Shanghai Jiao Tong University. Weiwei Jiang has 2 emails on RocketReach.
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