Weiwei Jiang Email & Phone Number
ASIC Design Engineer @ Meta
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Weiwei Jiang Location
- Sunnyvale, CA, US
Weiwei Jiang Work
- ASIC Design Engineer @ (April 2025 - Present)
- Senior Silicon Generalist, Architect and Design @ (January 2020 - April 2025)
- R and D Engineer, Senior @ (April 2018 - January 2020)
- Co-op engineer @ (June 2015 - December 2015)
- Researcher @ Research Institute of Image and Graphics, Tsinghua University (June 2007 - July 2008)
Weiwei Jiang Education
- Columbia University
Doctor of Philosophy - PhD (Computer Science)
2011-2017 - Columbia University
Master's degree (Computer Science)
2009-2011 - Tsinghua University
Bachelor (Electrical Engineering)
2003-2008
Weiwei Jiang Skills
- Algorithms
- C
- C++
- Cadence Virtuoso
- Computer Engineering
- Matlab
- Python (Programming Language)
- RTL Design
- Research
- System on a Chip (SoC)
- Verilog
Weiwei Jiang Summary
- Weiwei Jiang, based in Sunnyvale, CA, US, is currently a ASIC Design Engineer at Meta. Weiwei Jiang brings experience from previous roles at Google, Synopsys Inc, AMD and Research Institute of Image and Graphics, Tsinghua University. Weiwei Jiang holds a 2011 - 2017 Doctor of Philosophy - PhD in Computer Science @ Columbia University. With a robust skill set that includes Algorithms, C, C++, Cadence Virtuoso, Computer Engineering and more. Weiwei Jiang has 4 emails and 2 mobile phone numbers on RocketReach.
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