Yufeng Luo Email & Phone Number
Corporate VP R and D, Digital Design Implementation BU @ Cadence Design Systems
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Yufeng Luo Location
- San Jose, CA, US
Yufeng Luo Work
- Corporate VP R and D, Digital Design Implementation BU @ (October 2020 - Present)
- Vice President R and D, IC Digital BU @ (December 2017 - October 2020)
- Sr. Software Architect and Sr. R and D Group Director @ (January 2012 - December 2017)
- Principal Technologist @ (June 2007 - January 2012)
- Member of Technical Staff @ (May 2003 - June 2007)
- Staff R and D Engineer @ (August 1997 - May 2003)
- Software Engineer (Summer Intern) @ Ross Technology, Inc. (May 1997 - August 1997)
- Software Engineer (Summer Intern) @ Reliant Data Systems (May 1996 - August 1996)
Yufeng Luo Education
- The University of Texas at Austin
MS (Electrical and Computer Engineering)
1995-1997 - Fudan University
Graduate Student (Transferred to UT-Austin) (Computer Science)
1994-1995 - Shanghai Jiao Tong University
BS (Information and Control Engineering)
1990-1994
Yufeng Luo Skills
- Static Timing Analysis
- EDA
- Algorithms
- Multithreading
- Mathematical Optimization
- Mathematical Programming
- Physical Synthesis
- Physical Design
- C/C++ STL
- Software Engineering
- Distributed Systems
- OOP
- Java
- Debugging
- SoC
- Optimization
- Object Oriented Design
- C++
- TCL
- Leadership
- Social Media
- Sales
- Mathematical
- Microsoft Excel
- Management
Yufeng Luo Summary
- Yufeng Luo, based in San Jose, CA, US, is currently a Corporate VP R and D, Digital Design Implementation BU at Cadence Design Systems. Yufeng Luo brings experience from previous roles at Cadence Design Systems, Mentor Graphics Corporation and Sierra Design Automation. Yufeng Luo holds a 1995 - 1997 MS in Electrical and Computer Engineering @ The University of Texas at Austin. With a robust skill set that includes Static Timing Analysis, EDA, Algorithms, Multithreading, Mathematical Optimization and more. Yufeng Luo has 2 emails and 1 mobile phone numbers on RocketReach.
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