Yogesh Kulkarni's Location
Santa Clara, CA, US
Yogesh Kulkarni's Work
- Director, HW Engineering @ NVIDIA
- Senior ASIC Design Manager @ NVIDIA
- Senior ASIC Design Engineer @ NVIDIA
- ASIC Design Engineer @ NVIDIA
- Project Assistant @ UW-Madison, Dept of Botany
Yogesh Kulkarni's Education
- University of Wisconsin-Madison
MS (Electrical and Computer Engineering)
2002 - 2004 - VJTI
BE (Electronics)
1998 - 2002
Yogesh Kulkarni's Skills
- Verilog
- Microprocessors
- Digital design and verification
- RTL design
- Computer Architecture
- SoC
- VLSI
- Static Timing Analysis
- ASIC
- Logic Design
Yogesh Kulkarni's Summary
Yogesh Kulkarni, based in Santa Clara, CA, US, is currently a Director, HW Engineering at NVIDIA, bringing experience from previous roles at NVIDIA and UW-Madison, Dept of Botany. Yogesh Kulkarni holds a 2002 - 2004 MS in Electrical and Computer Engineering @ University of Wisconsin-Madison. With a robust skill set that includes Verilog, Microprocessors, Digital design and verification, RTL design, Computer Architecture and more, Yogesh Kulkarni contributes valuable insights to the industry. Yogesh Kulkarni has 2 emails and 1 mobile phone number on RocketReach.
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