If you need more lookups,
subscriptions start at $34 USD/month.
Vivek Gopalan Location
Boise, ID, US
Vivek Gopalan Work
2020 -now Sr. Manager - Wafer Level Reliability @
2018 -2020 Principal Engineer DRAM CMOS @
2016 -2018 Principal Engineer DRAM Process Integration @
2008 -2016 Senior Process Integration Engineer @
2005 -2008 Electrical Failure Analysis and Param Engineer @
Vivek Gopalan Education
Arizona State University
M.S.E (Electrical Engineering)
2001-2003
Vivek Gopalan Skills
Process Integration
Integration
Vivek Gopalan Summary
Vivek Gopalan, based in Boise, ID, US, is currently a Sr. Manager - Wafer Level Reliability at Micron Technology. Vivek Gopalan brings experience from previous roles at Micron Technology. Vivek Gopalan holds a 2001 - 2003 M.S.E in Electrical Engineering @ Arizona State University. With a robust skill set that includes Process Integration, Integration and more. Vivek Gopalan has 2 emails and 1 mobile phone numbers on RocketReach.
Looking for a different Vivek Gopalan?
Find contact details for 700 million professionals.