Erik Byers Email & Phone Number
VP, DRAM-Emerging Memory Process Development @ Micron Technology
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Erik Byers Location
- Boise, ID, US
Erik Byers Work
- VP, DRAM-Emerging Memory Process Development @ (November 2019 - Present)
- Sr. Technology Director, NAND Process Integration @ (November 2017 - November 2019)
- Director, DRAM Process Development @ (January 2015 - November 2017)
- Director, Processs Developmen @ (October 2012 - January 2015)
- Sr. Manager, NOR Process Integration @ (December 2010 - October 2012)
- Sr. Manager, Photolithography Processs Development @ (October 2006 - December 2010)
- Process Engineer @ (August 1994 - October 2006)
Erik Byers Education
- University of Washington
Bachelor of Science (BS) (Chemical Engineering)
1989-1994
Erik Byers Skills
- R&D
- Process Simulation
- Engineering
- Integration
- Semiconductors
- Photolithography
- Design of Experiments
- Semiconductor Industry
- Thin Films
- SPC
- Silicon
- JMP
- IC
- Failure Analysis
- CMOS
- Characterization
- Metrology
- Product Engineering
- Process Engineering
- Engineering Management
Erik Byers Summary
- Erik Byers, based in Boise, ID, US, is currently a VP, DRAM-Emerging Memory Process Development at Micron Technology. Erik Byers brings experience from previous roles at Micron Technology. Erik Byers holds a 1989 - 1994 Bachelor of Science (BS) in Chemical Engineering @ University of Washington. With a robust skill set that includes R&D, Process Simulation, Engineering, Integration, Semiconductors and more. Erik Byers has 4 emails and 1 mobile phone numbers on RocketReach.
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