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Andrew Laforge Location
Boise, ID, US
Andrew Laforge Work
Vice President - DRAM and Emerging Memory Quality and Reliability Assurance @ (November 2023 - Present)
Senior Director - DRAM and Emerging Memory Quality and Reliability Assurance @ (November 2019 - November 2023)
Director - DRAM Quality and Reliability Assurance @ (April 2019 - October 2019)
Senior Manager - DRAM Quality and Reliability Assurance @ (June 2017 - April 2019)
Manager - DRAM Quality and Reliability Assurance @ (August 2011 - June 2017)
DRAM Product Engineer @ (January 2002 - August 2011)
Fab Wafer Process Engineer @ (September 2000 - January 2002)
Andrew Laforge Education
University of Portland
Bachelor of Science (B.S.) (Electrical and Electronics Engineering)
1996-2000
Andrew Laforge Skills
Semiconductor Industry
Semiconductors
Testing
Failure Analysis
CMOS
Engineering
Integrated Circuits (IC)
Leadership
Integrated Circuits Ic
Manufacturing
Integrated Circuits
Andrew Laforge Summary
Andrew Laforge, based in Boise, ID, US, is currently a Vice President - DRAM and Emerging Memory Quality and Reliability Assurance at Micron Technology. Andrew Laforge brings experience from previous roles at Micron Technology. Andrew Laforge holds a 1996 - 2000 Bachelor of Science (B.S.) in Electrical and Electronics Engineering @ University of Portland. With a robust skill set that includes Semiconductor Industry, Semiconductors, Testing, Failure Analysis, CMOS and more. Andrew Laforge has 2 emails and 1 mobile phone numbers on RocketReach.
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