2006 -2017 Analog Physical Layout Design Engineer @
2010 -2011 Training Lead @
Venkatesh Bhat Education
B V B College of Engg. & Technology, HUBLI
Master of Technology - MTech (VLSI and Embedded Systems)
2006-2012
National Institute Of Engineering, Mysore
Bachelor of Engineering (B.E.) (Electrical, Electronics and Communications Engineering)
2002-2006
Swami Vivekananda Pre University College
Pre university (PCMS)
2000-2002
St. Phylomena Boys High School, Puttur
SSLC
1997-2000
Venkatesh Bhat Skills
VLSI
DRC
Analog
Cadence Virtuoso
LVS
EDA
Floorplanning
Physical Design
Cadence Skill
Physical Verification
CMOS
Mixed Signal
Hercules
Parasitic Extraction
Spectre
RF Layout
Venkatesh Bhat Summary
Venkatesh Bhat, based in Bengaluru, KA, IN, is currently a Layout Manager at Cadence Design Systems. Venkatesh Bhat brings experience from previous roles at Rambus, Sankalp Semiconductor Pvt Ltd and Sankalp Semiconductors Pvt Ltd. Venkatesh Bhat holds a 2006 - 2012 Master of Technology - MTech in VLSI and Embedded Systems @ B V B College of Engg. & Technology, HUBLI. With a robust skill set that includes VLSI, DRC, Analog, Cadence Virtuoso, LVS and more. Venkatesh Bhat has 3 emails and 1 mobile phone numbers on RocketReach.
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