Udit Narula Email

Principal Engineer (DRAM- ID1 ATE HVM Process Integration) @ Micron Technology

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Udit Narula Location

Boise, ID, US

Udit Narula Work

2026 - now Principal Engineer (DRAM- ID1 ATE HVM Process Integration) @ Micron Technology
2025 - 2025 Principal Engineer (3D NAND- TD Process Integration) @ Micron Technology
2022 - 2025 Senior Engineer (3D NAND- TD Process Integration) @ Micron Technology

2019 - 2022 Engineer (3D NAND- TD Process Integration) @ Intel Corporation
2018 - 2019 Post Doctorate at Center for Reliability Sciences and Technologies @ Chang Gung University
2013 - 2018 Researcher Phd Candidate @ Chang Gung University

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Udit Narula Education

Chang Gung University
Doctor of Philosophy - PhD (Electrical and Electronics Engineering)
2013 - 2018
Amity University Delhi
Master of Technology - MTech (VLSI)
2011 - 2013
Maharshi Dayanand University
Bachelor of Technology - BTech (Electrical, Electronics and Communications Engineering)
2007 - 2011

Udit Narula Summary

Udit Narula, based in Boise, ID, US, is currently a Principal Engineer (DRAM- ID1 ATE HVM Process Integration) at Micron Technology. Udit Narula brings experience from previous roles at Micron Technology, Intel Corporation and Chang Gung University. Udit Narula holds a 2013 - 2018 Doctor of Philosophy - PhD in Electrical and Electronics Engineering @ Chang Gung University. Udit Narula has 3 emails on RocketReach.

Udit Narula Emails

Found 3 emails

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