Steve Schauer Location

Loveland, CO, US

Steve Schauer Work

  • 2017 - 2018 FW Architect and Designer @ FLXSA, LLC
  • 2017 - 2017 SR. ASIC Designer @ Kazan Networks
  • 2011 - 2017 Principle Architect and ASIC Designer @ Micron Technology
  • 1997 - 2011 Sr. IP Design Engineer @ LSI, an Avago Technologies Company
  • 1987 - 1997 HW Design Project Lead @ Honeywell Defense Avionics Systems
  • 1981 - 1984 Instrument Engineer @ Texas Instruments (GSI)

Steve Schauer Education

  • Montana State University-Bozeman

    Bachelor of Science (BS) (Electrical and Electronics Engineering)

    1984 - 1987
  • North Dakota State College of Science

    Associate of Arts and Sciences (A.A.S.) (Electromechanical Technology/Electromechanical Engineering Technology)

    1979 - 1981

Steve Schauer Skills

  • Application-Specific Integrated Circuits (ASIC)
  • Testing
  • RTL Design
  • Firmware
  • Hardware Architecture
  • C++
  • Systemverilog
  • Verilog
  • SAS
  • Serial ATA (SATA)

Steve Schauer Summary

Steve Schauer, based in Loveland, CO, US, is currently a Senior ASIC Architect at Micron Technology. Steve Schauer brings experience from previous roles at Syncroness, Goke US Research Labs, FLXSA, LLC and Kazan Networks. Steve Schauer holds a 1984 - 1987 Bachelor of Science (BS) in Electrical and Electronics Engineering @ Montana State University-Bozeman. With a robust skill set that includes Application-Specific Integrated Circuits (ASIC), Testing, RTL Design, Firmware, Hardware Architecture and more. Steve Schauer has 3 emails and 4 mobile phone numbers on RocketReach.

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