Stephen Pfeiffer Email & Phone Number
Senior Architect Workflow Optimization @ NVIDIA
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Stephen Pfeiffer Location
- Watsonville, CA, US
Stephen Pfeiffer Work
- 2020 -now Senior Architect Workflow Optimization @
- 1992 -2020 Principal Engineer, Design Flow Architecture, Design Automation, IP Release @
Stephen Pfeiffer Education
- University of Michigan
Bachelor of Engineering - BE - Electrical Engineering (Electrical and Electronics Engineering)
Stephen Pfeiffer Skills
- EDA
- Intel
- Silicon
- SoC
- Processors
- Microprocessors
- Circuit Design
- Hardware Design
- VLSI
- CMOS
- Digital Design
- Semiconductors
- Engineering Management
- Electrical Engineering
- Perl
- Static Timing Analysis
- Software Development
- Engineering
- IC
- C
- Primetime
- Physical Design
- SystemVerilog
- Computer Architecture
- Managing Database
- SQL
- Integrated Circuit Design
- CAD
- Flow Development
- Integrated Circuits (IC)
- Very-Large-Scale Integration (VLSI)
- System on a Chip (SoC)
- Application-Specific Integrated Circuits (ASIC)
- Linux
- TCL
- Design
- Integrated Circuits Ic
- Program Management
- Very Large Scale Integration Vlsi
- Microsoft Office
- Software Design
- Verification
- Application Specific Integrated Circuits Asic
- Automation
- Integration
- System on a Chip Soc
- MySQL
- Graphic Design
- Sales
- Design Automation
- Architecture
- Database Modeling
Stephen Pfeiffer Summary
- Stephen Pfeiffer, based in Watsonville, CA, US, is currently a Senior Architect Workflow Optimization at NVIDIA. Stephen Pfeiffer brings experience from previous roles at Intel. Stephen Pfeiffer holds a Bachelor of Engineering - BE - Electrical Engineering in Electrical and Electronics Engineering @ University of Michigan. With a robust skill set that includes EDA, Intel, Silicon, SoC, Processors and more. Stephen Pfeiffer has 2 emails on RocketReach.
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