Srinidhi Nagaraj's Location

Santa Clara, CA, US

Srinidhi Nagaraj's Work

  • Director, RTL Integration and Physical Design @ AMD
  • Senior Hardware Design Engineer @ NVIDIA
  • Member Of Technical Staff @ AMD

Srinidhi Nagaraj's Education

  • The University of Texas at Arlington

    Master of Science (MS) (Electrical Engineering)

    2001 - 2003
  • University of Mysore

    Bachelor's degree (Electrical and Electronics Engineering)

    1996 - 2000

Srinidhi Nagaraj's Skills

  • Static Timing Analysis
  • Physical Design
  • ASIC
  • SoC
  • VLSI
  • EDA
  • Timing Closure
  • Verilog
  • Floorplanning
  • Integrated Circuit Design

Srinidhi Nagaraj's Summary

Srinidhi Nagaraj, based in Santa Clara, CA, US, is currently a Director, RTL Integration and Physical Design at AMD, bringing experience from previous roles at NVIDIA, AMD and Sasken. Srinidhi Nagaraj holds a 2001 - 2003 Master of Science (MS) in Electrical Engineering @ The University of Texas at Arlington. With a robust skill set that includes Static Timing Analysis, Physical Design, ASIC, SoC, VLSI and more, Srinidhi Nagaraj contributes valuable insights to the industry. Srinidhi Nagaraj has 3 emails on RocketReach.

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