University of California, Berkeley, Haas School of Business
Kendriya Vidyalaya
Harish Venkumahanti's Skills
ASIC
Static Timing Analysis
SoC
Verilog
FPGA
RTL design
Perl
Physical Design
TCL
Timing Closure
Harish Venkumahanti's Summary
Harish Venkumahanti, based in Sunnyvale, CA, US, is currently a Senior Physical Design Timing Engineer at Apple, bringing experience from previous roles at Sandisk and Wipro. Harish Venkumahanti holds a 2001 - 2003 Master of Science @ Birla Institute of Technology and Science, Pilani. With a robust skill set that includes ASIC, Static Timing Analysis, SoC, Verilog, FPGA and more, Harish Venkumahanti contributes valuable insights to the industry. Harish Venkumahanti has 2 emails and 1 mobile phone number on RocketReach.