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Ryan Payne Location
Lake Forest, CA, US
Ryan Payne Work
Senior Director, Head of SSD Hardware Engineering @ (February 2025 - Present)
Senior Director, Head of SSD Hardware Engineering @ (February 2024 - February 2025)
Director, SSD Hardware Validation @ (September 2021 - January 2024)
Senior Engineering Manager, Enterprise HDD and SSD Hardware Validation @ (January 2020 - September 2021)
Engineering Manager, PCBA Electronics and EMC Validation @ (July 2016 - December 2019)
Engineering Associate Manager, PCBA Electronics and EMC Validation @ (February 2015 - June 2016)
Staff Electronics Design Engineer @ (July 2013 - February 2015)
Sr. Electronics Design Engineer @ (December 2010 - June 2013)
Electronic Design Engineer @ (July 2008 - November 2010)
Test Intern @ Esterline Palomar Products (April 2007 - August 2007)
Design Intern @ (May 2006 - August 2006)
Tech Intern @ (June 2004 - August 2004)
Ryan Payne Education
San Diego State University
Bachelor of Science (B.S.) (Electrical Engineering)
2003-2008
University of Oxford
(Optoelectronics)
2007-2007
Ryan Payne Skills
Soldering
Multimeter
hyperlynx simulation for ddr routing
TDR and scope measurements
Thermal Analysis
EMI
emissions and susceptibility for FCC regulations
PCB Design
Electronics
Simulations
Engineering
Engineering Management
Ryan Payne Summary
Ryan Payne, based in Lake Forest, CA, US, is currently a Senior Director, Head of SSD Hardware Engineering at Sandisk. Ryan Payne brings experience from previous roles at Western Digital. Ryan Payne holds a 2003 - 2008 Bachelor of Science (B.S.) in Electrical Engineering @ San Diego State University. With a robust skill set that includes Soldering, Multimeter, hyperlynx simulation for ddr routing, TDR and scope measurements, Thermal Analysis and more. Ryan Payne has 2 emails and 2 mobile phone numbers on RocketReach.
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