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Jong Lee Location
Saratoga, CA, US
Jong Lee Work
2025 -now Corporate Vice President @
2020 -2025 Senior Director @
2015 -2020 Fellow @
2013 -2015 Director @
2012 -2013 Senior Staff Engineer @
2003 -2012 SoC Design Manager and Staff Engineer @
2001 -2003 Design and Verification Engineer @ Fast-Chip
1998 -2001 Firmware Engineer @ AMRTech
Jong Lee Education
Stanford University
MS (Electrical Engineering)
Seoul National University
BS (Computer Engineering)
Jong Lee Skills
Static Timing Analysis
Primetime
Timing Closure
DFT
SoC
Design
Architecture
Jong Lee Summary
Jong Lee, based in Saratoga, CA, US, is currently a Corporate Vice President at Sandisk. Jong Lee brings experience from previous roles at Micron Technology, SK hynix memory solutions inc., Marvell Semiconductor and Qualcomm. Jong Lee holds a MS in Electrical Engineering @ Stanford University. With a robust skill set that includes Static Timing Analysis, Primetime, Timing Closure, DFT, SoC and more. Jong Lee has 1 emails and 1 mobile phone numbers on RocketReach.
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