Nir Weiss Email & Phone Number

Nir Weiss Skills

• Functional Verification
• SoC
• Specman
• SystemVerilog
• Verilog
• EDA
• NCSim
• Debugging
• Simulations
• UVM
• VHDL
• Cadence
• Field-Programmable Gate Arrays (FPGA)
• RTL Coding
• Universal Verification Methodology (UVM)
• Management
• Semiconductors
• Product Development
• Project Management
• SQL
• R
• Program Management
• Process Engineering
• Engineering Management
• Cross Functional Team Leadership
• Manufacturing
• Product Management
• Process Improvement
• Engineering
• R&D
• Project Planning
• Procurement
• Budgets
• Logic Design
• Power
• Field Programmable Gate Arrays Fpga
• RTL design
• ARM
• ASIC
• OCP
• Power Management
• Hardware Verification
• VLSI
• TCL
• Application Specific Integrated Circuits Asic
• Open Verification Methodology
• ModelSim
• Universal Verification Methodology Uvm
• Hardware
• Design
• SystemC
• Hardware Description Language
• Verification
• JTAG
• Universal Verification Methodology
• Field Programmable Gate Arrays