Nir Weiss Email & Phone Number
Senior Product Engineering Architect @ Cadence Design Systems
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Nir Weiss Location
- Austin, TX, US
Nir Weiss Work
- Senior Product Engineering Architect @ (September 2022 - Present)
- AR and VR: CAD, Methodology, and Infrastructure Engineer @ (September 2021 - September 2022)
- Customer Engagement Director @ (July 2019 - September 2021)
- Sr. Principal Product Engineer @ (June 2016 - July 2019)
- Principal Product Engineer @ (September 2015 - June 2016)
- Senior Verification Engineer @ (April 2015 - September 2015)
- Principal Application Engineer @ (July 2013 - April 2015)
- Lead Verification Application Engineer @ (May 2012 - July 2013)
- Lead Verification Application Engineer @ (June 2010 - May 2012)
- Design Verification Engineer @ (May 2006 - June 2010)
- Design Verification Engineer @ (March 2004 - May 2006)
Nir Weiss Education
- Ben-Gurion University of the Negev
B.Sc (Electrical & Computers Engineering)
2000-2004
Nir Weiss Skills
- Functional Verification
- SoC
- Specman
- SystemVerilog
- Verilog
- EDA
- NCSim
- Debugging
- Simulations
- UVM
- VHDL
- Cadence
- Field-Programmable Gate Arrays (FPGA)
- RTL Coding
- Universal Verification Methodology (UVM)
- Management
- Semiconductors
- Product Development
- Project Management
- SQL
- R
- Program Management
- Process Engineering
- Engineering Management
- Cross Functional Team Leadership
- Manufacturing
- Product Management
- Process Improvement
- Engineering
- R&D
- Project Planning
- Procurement
- Budgets
- Logic Design
- Power
- Field Programmable Gate Arrays Fpga
- RTL design
- ARM
- ASIC
- OCP
- Power Management
- Hardware Verification
- VLSI
- TCL
- Application Specific Integrated Circuits Asic
- Open Verification Methodology
- ModelSim
- Universal Verification Methodology Uvm
- Hardware
- Design
- SystemC
- Hardware Description Language
- Verification
- JTAG
- Universal Verification Methodology
- Field Programmable Gate Arrays
Nir Weiss Summary
- Nir Weiss, based in Austin, TX, US, is currently a Senior Product Engineering Architect at Cadence Design Systems. Nir Weiss brings experience from previous roles at Meta and Cadence Design Systems. Nir Weiss holds a 2000 - 2004 B.Sc in Electrical & Computers Engineering @ Ben-Gurion University of the Negev. With a robust skill set that includes Functional Verification, SoC, Specman, SystemVerilog, Verilog and more. Nir Weiss has 2 emails and 1 mobile phone numbers on RocketReach.
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