Mohit Patel Email & Phone Number
Sr. Principal Design Engineer @ Cadence Design Systems
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Mohit Patel Location
- California, United States
Mohit Patel Work
- Sr. Principal Design Engineer @ (March 2026 - Present)
- Senior ASIC Digital Logic Design Engineer @ (June 2016 - December 2021)
- Sr Graphics Hardware Design Engineer @ (September 2012 - June 2016)
- Graphic Design Intern @ (January 2012 - August 2012)
- Graduate Research Assistant @ California Smart Grid Center (January 2011 - December 2011)
- Micro-Architect @ (December 2021 - March 2026)
- RF Engineer Intern @ (January 2009 - October 2009)
Mohit Patel Education
- California State University-Sacramento
MS (Digital Design & Computer Architecture / (VLSI))
2010-2012 - Gujarat University
B.E (Electronics & Communication)
2005-2009
Mohit Patel Skills
- Computer Architecture
- Verification/ Validation
- VLSI Design/Testing
- Verilog
- system verilog
- Perl Automation
- C
- C++
- Graphic Design
- TCL
- RTL Verification
- RTL Design
- RTL Coding
- Synopsys tools
- PCIe
- PCI Standards
- Verdi
- ASIC
- ModelSim
- VHDL
- Perl
- Field-Programmable Gate Arrays (FPGA)
- Static Timing Analysis
- Functional Verification
- Simulations
- Matlab
- Field Programmable Gate Arrays Fpga
- Microcontrollers
- Microsoft Office
- Cadence Virtuoso
- SystemVerilog
- Embedded Systems
- Pspice
- Proteus
- Microprocessors
- CMOS
- Xilinx
- Linux
- Xilinx ISE
- Python
- SPICE
- SoC
- Place and Route
- Code Coverage
- Assertion Based Verification
- Clock Tree Synthesis
- Physical Design
- Questa
- Emulation
- Calibre
- Object Oriented Programming
- UVM
- Field Programmable Gate Arrays
Mohit Patel Summary
- Mohit Patel, based in California, United States, is currently a Sr. Principal Design Engineer at Cadence. Mohit Patel brings experience from previous roles at Intel Corporation and California Smart Grid Center. Mohit Patel holds a 2010 - 2012 MS in Digital Design & Computer Architecture / (VLSI) @ California State University-Sacramento. With a robust skill set that includes Computer Architecture, Verification/ Validation, VLSI Design/Testing, Verilog, system verilog and more. Mohit Patel has 3 emails and 3 mobile phone numbers on RocketReach.
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