Marcin Behrendt Email
Design Engineering Architect @ Cadence Design Systems
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Marcin Behrendt Location
- Katowice, PL
Marcin Behrendt Work
- 2023 -now Design Engineering Architect @
- 2021 -2023 IP Architect (Silicon Architecture Engineer) @
- 2021 -2021 IP Logic Design Engineer @
- 2020 -2021 Senior Principal Design Engineer @
- 2016 -2020 Principal Design Engineer @
- 2013 -2016 Lead Design Engineer @
- 2008 -2013 Design Engineer @
Marcin Behrendt Education
- The Silesian University of Technology
Master's degree (Electrical and Electronics Engineering)
2003-2008
Marcin Behrendt Skills
- Verilog
- VHDL
- RTL
- Integrated Circuit Design
- FPGA
- ASIC
- C++
- SystemC
- Xilinx
- CDC
- Static Timing Analysis
- Management
- Strategy
- Strategic Planning
- Graphic Design
Marcin Behrendt Summary
- Marcin Behrendt, based in Katowice, PL, is currently a Design Engineering Architect at Cadence Design Systems. Marcin Behrendt brings experience from previous roles at Intel Corporation and Cadence Design Systems. Marcin Behrendt holds a 2003 - 2008 Master's degree in Electrical and Electronics Engineering @ The Silesian University of Technology. With a robust skill set that includes Verilog, VHDL, RTL, Integrated Circuit Design, FPGA and more. Marcin Behrendt has 2 emails on RocketReach.
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