Kailiang Chen Email & Phone Number
VP of R and D @ 3PEAK INCORPORATED
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Kailiang Chen Location
- Shanghai, CN
Kailiang Chen Work
- 2021 -now VP of R and D @
- 2016 -2021 VP of ASIC Design @
- 2014 -2016 Senior IC Design Engineer @
- 2011 -2011 Intern @
Kailiang Chen Education
- Massachusetts Institute of Technology
PhD (EE)
2009-2014 - 美国麻省理工学院
MS (EE)
2007-2009 - 清华大学
BE (EE)
2003-2007 - Tsinghua University
Bachelor of Engineering - BE (EE)
2003-2007
Kailiang Chen Skills
- Matlab
- RF
- Circuit Design
- Sensors
- Verilog
- VHDL
- Simulations
- Signal Processing
- VLSI
- Analog Circuit Design
- FPGA
- Cadence Virtuoso
- Optimization
- C
- Labview
- Semiconductors
- CMOS
- Integrated Circuit Design
- Algorithms
- Machine Learning
- C++
- Medical Devices
- Analog
- SPICE
- Solidworks
- Eagle PCB
- GNU Octave
- Mixed Signal
- ModelSim
- Management
- LaTeX
- Technology
- Test Engineering
- SQL
- Design
- Verilog Ams
- Python
- Medical Ultrasound
- Ultrasound Therapy
- Troubleshooting
Kailiang Chen Summary
- Kailiang Chen, based in Shanghai, CN, is currently a VP of R and D at 3PEAK INCORPORATED. Kailiang Chen brings experience from previous roles at Butterfly Network, Inc. and Texas Instruments. Kailiang Chen holds a 2009 - 2014 PhD in EE @ Massachusetts Institute of Technology. With a robust skill set that includes Matlab, RF, Circuit Design, Sensors, Verilog and more. Kailiang Chen has 2 emails and 1 mobile phone numbers on RocketReach.
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