John Nehls Email & Phone Number
Senior Solutions Architect, System Level Verification @ Cadence Design Systems
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John Nehls Location
- Arvada, CO, US
John Nehls Work
- Senior Solutions Architect, System Level Verification @ (January 2014 - Present)
- Technical Director, Metric Driven Verification @ (January 2005 - January 2013)
- Technical Director, North America @ Verisity (January 2000 - January 2005)
- Ae @ (January 1994 - January 2000)
- Senior Design and Verification Engineer @ (January 1990 - January 1994)
John Nehls Education
- University of Florida
Bachelor Of Science (Electrical Engineering, Computer Engineering)
1984-1989
John Nehls Skills
- Specman
- Functional Verification
- NCSim
- SystemVerilog
- Formal Verification
- SystemC
- Emulation
- EDA
- RTL design
- PCIe
- ASIC
- SoC
- Verilog
- VLSI
- ModelSim
- Processors
- TCL
- Logic Synthesis
- VHDL
- Integrated Circuit Design
- IC
- Debugging
- UVM
- Hardware Architecture
- System On A Chip Soc
- Integrated Circuits Ic
- Application Specific Integrated Circuits Asic
- Portable Stimulus
- Portable Stimulus Pss
- Application Specific Integrated Circuits
- Integrated Circuits
- System on a Chip
John Nehls Summary
- John Nehls, based in Arvada, CO, US, is currently a Senior Solutions Architect, System Level Verification at Cadence Design Systems. John Nehls brings experience from previous roles at Cadence Design Systems, Verisity, Synopsys Inc and Harris Corporation. John Nehls holds a 1984 - 1989 Bachelor Of Science in Electrical Engineering, Computer Engineering @ University of Florida. With a robust skill set that includes Specman, Functional Verification, NCSim, SystemVerilog, Formal Verification and more. John Nehls has 1 emails on RocketReach.
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