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John MacBeth Location
Glasgow, GB
John MacBeth Work
Verification Architect @ (May 2025 - Present)
Sr. Manager ASIC D and V @ (February 2024 - April 2025)
Sr. Staff ASIC Digital Design Engineer @ (July 2022 - February 2024)
Sr. Principal Design Engineer @ (January 2022 - July 2022)
Senior Verification Consultant @ (October 2018 - December 2021)
Sr. Principal Design Engineer @ (July 2014 - September 2018)
Principal Services Application Engineer @ (June 2010 - July 2014)
Lead Services Application Engineer @ (February 2009 - June 2010)
Lead Services Application Engineer @ (September 2006 - February 2009)
Verification Consultant @ (July 2002 - July 2006)
Research Student @ (January 1998 - January 2002)
John MacBeth Education
University of Strathclyde
Doctor of Philosophy (Ph.D.)
1998-2002
University of Strathclyde
Bachelor’s Degree
1994-1998
John MacBeth Skills
APB
ASIC
AXI
Agile Project Management
Application-Specific Integrated Circuits (ASIC)
Continuous Integration
Design Verification Testing
Digital Signal Processors
EDA
Ethernet
Field-Programmable Gate Arrays (FPGA)
Formal Verification
Functional Verification
Open Verification Methodology
PCIe
Scrum
Semiconductors
SoC
Software Design Patterns
Specman
Subversion
System on a Chip (SoC)
SystemC
SystemVerilog
USB
USB3.0
UVM
Universal Verification Methodology (UVM)
VHDL
Verilog
John MacBeth Summary
John MacBeth, based in Glasgow, GB, is currently a Verification Architect at Cadence. John MacBeth brings experience from previous roles at Synopsys Inc, Cadence Design Systems and Verilab. John MacBeth holds a 1998 - 2002 Doctor of Philosophy (Ph.D.) @ University of Strathclyde. With a robust skill set that includes APB, ASIC, AXI, Agile Project Management, Application-Specific Integrated Circuits (ASIC) and more. John MacBeth has 2 emails on RocketReach.
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