Jing Fu Email & Phone Number
Principle Physical Design Engineer @ NVIDIA
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Jing Fu Location
- Cupertino, CA, US
Jing Fu Work
- 2025 -now Principle Physical Design Engineer @
- 2021 -2024 Senior Staff Physical Design Engineer @
- 2020 -2021 Member Of Technical Staff @
- 2016 -2020 CPU Design Engineer @
- 2012 -2016 Senior Physical Design Engineer @
- 2010 -2012 Component Design Engineer @
Jing Fu Education
- UC Santa Barbara
- University of California, Berkeley
Jing Fu Skills
- VLSI
- ASIC
- Static Timing Analysis
- Verilog
- Perl
- Embedded Systems
- C
- Microsoft Office
- Debugging
- Linux
- Matlab
- C++
- Synopsys tools
- Synopsys Primetime
- Presto
- Clock Tree Synthesis
- Clock Distribution
- Digital Circuit Design
- Timing Closure
- Floorplanning
- RV
- PLL
- Low-power Design
- Low Voltage Design
- Clocking
- Graphics
- Semiconductor Industry
- Semiconductors
- Design
- Physical Design
- Low Power Design
- Component Design
- Hardware
Jing Fu Summary
- Jing Fu, based in Cupertino, CA, US, is currently a Principle Physical Design Engineer at NVIDIA. Jing Fu brings experience from previous roles at Qualcomm, NUVIA Inc, Apple and Intel Corporation. Jing Fu holds a UC Santa Barbara. With a robust skill set that includes VLSI, ASIC, Static Timing Analysis, Verilog, Perl and more. Jing Fu has 3 emails and 2 mobile phone numbers on RocketReach.
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