2016 -now Principal Analog and Mixed Signal Design Engineer @
2012 -2015 Senior Member of Technical Staff @
2000 -2012 Staff Analog IC Design Engineer @
Fuding Ge Education
Arizona State University
(Electric Engineering)
2003-2007
Arizona State University
MSEE (Electronic Engineering)
1997-1999
Central Iron and Steel Research Institute (Beijing, China) 1994-1997
Lanzhou University
MS (Solid-State Physics)
1986-1993
Fuding Ge Skills
Testing
Physical Design
Matlab/Simulink
Analog
Mixed Signal
SERDES
Digital Cdr Clock and Data Recovery
FPGA
Current Sense for Dc Dc Converter
Amplifiers
Spectre
Silicon
Delta Sigma Modulator
ASIC
Power Management
Java
Adc Low Power Adc
Low Power Design
Circuit Design
SoC
Cadence Virtuoso
Mixed Signal Ic Design
LNA
Integrated Circuits Ic
System on a Chip Soc
Delta Sigma Adc
Phase Locked Loop Pll
CMOS
Digital Pll Phase Locked Loop
RTL design
Ultra Low Offset Amplifier and Instrumentation Amplifier
DAC
ADCs
Integrated Circuit Design
EDA
SPICE
Sensors
Cadence
Sensor Interface Ic
IC
Pipeline Adc
PLL
Ldo
RF
Verilog
VLSI
Signal Integrity
Analog Circuit Design
Static Timing Analysis
Semiconductors
Low Noise Amplifier Lna
Power Management Ic
Dc Dc
Adc
Digital Cdr
Digital Pll
Integrated Circuits
System on a Chip
Low Noise Amplifier
Phase Locked Loop
Fuding Ge Summary
Fuding Ge, based in Palm Bay, FL, US, is currently a Principal Analog and Mixed Signal Design Engineer at Intersil Corporation. Fuding Ge brings experience from previous roles at Freescale Semiconductor and Intel. Fuding Ge holds a 2003 - 2007 Arizona State University. With a robust skill set that includes Testing, Physical Design, Matlab/Simulink, Analog, Mixed Signal and more. Fuding Ge has 1 emails and 1 mobile phone numbers on RocketReach.
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