Eric Combes Location
Blainville, QC, CA
Eric Combes Work
- 2020 - now Senior Principal ASIC Design Verification Engineering @ Cadence Design Systems
- 2015 - 2020 FPGA Designer @ Accedian
- 2014 - 2015 FPGA Designer @ HCL America, Inc.
- 2007 - 2014 FPGA Designer @ Nokia
- 2000 - 2006 Hardware and FPGA Designer @ Nortel Networks
Eric Combes Education
- École de technologie supérieure
Bachelor (Electrical Engineering)
1994 - 1998 - Institut d'ordinique du Quebec - College Lionel-Groulx
Cegep (Technologies des Systemes Ordines)
1990 - 1994
Eric Combes Skills
- FPGA
- SystemVerilog
- Verilog
- RTL design
- RTL verification
- SoC
- UVM
- Scripting
- TCL
- C
Eric Combes Summary
Eric Combes, based in Blainville, QC, CA, is currently a Senior Principal ASIC Design Verification Engineering at Cadence Design Systems. Eric Combes brings experience from previous roles at Accedian Networks, HCL Technologies, Alcatel-Lucent and Nortel Networks. Eric Combes holds a 1994 - 1998 Bachelor in Electrical Engineering @ École de technologie supérieure. With a robust skill set that includes FPGA, SystemVerilog, Verilog, RTL design, RTL verification and more. Eric Combes has 2 emails on RocketReach.
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