Deepanjan Roy Email & Phone Number
Formal Verification Manager @ NVIDIA
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Deepanjan Roy Location
- Austin, TX, US
Deepanjan Roy Work
- 2021 -now Formal Verification Manager @
- 2011 -2022 Sr. ASIC Design Engg @
- 2009 -2011 Formal Verification Engg @
- 2007 -2009 Consultant - Formal Verifiaction @
- 2006 -2009 SMTS @
Deepanjan Roy Education
- Jadavpur University
Bachelor of Engineering (BE) (Instrumentation and Electronics Engg [IEE])
2002-2006
Deepanjan Roy Skills
- ASIC
- Formal Verification
- Verilog
- SystemVerilog
- VLSI
- Functional Verification
- EDA
- SoC
- Static Timing Analysis
- Debugging
- Perl
- VHDL
- Integrated Circuit Design
- Timing Closure
- Logic Synthesis
- Logic Design
- FPGA
- Computer Architecture
- Physical Design
- Primetime
- NCSim
- ModelSim
- Low-power Design
- TCL
- Open Verification Methodology
- RTL Design
- Very-Large-Scale Integration (VLSI)
- Application-Specific Integrated Circuits (ASIC)
- Open Verification
- Graphics
- Openings
- Integrated Circuit
- Application Specific Integrated Circuits Asic
- RTL coding
- Semiconductors
- Design
- Low Power Design
- Very Large Scale Integration Vlsi
- Verification
- Asic Design
- Very Large Scale Integration
- Application Specific Integrated Circuits
Deepanjan Roy Summary
- Deepanjan Roy, based in Austin, TX, US, is currently a Formal Verification Manager at NVIDIA. Deepanjan Roy brings experience from previous roles at NVIDIA, Texas Instruments and Interra Systems. Deepanjan Roy holds a 2002 - 2006 Bachelor of Engineering (BE) in Instrumentation and Electronics Engg [IEE] @ Jadavpur University. With a robust skill set that includes ASIC, Formal Verification, Verilog, SystemVerilog, VLSI and more. Deepanjan Roy has 3 emails and 1 mobile phone numbers on RocketReach.
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