Deepak Asnani Email & Phone Number
Senior Director Post Silicon Validation @ NVIDIA
5 free lookup(s).
Deepak Asnani Location
- Oakland, CA, US
Deepak Asnani Work
- 2025 - now Senior Director Post Silicon Validation @
- 2024 - 2026 Sr. Director Post Silicon Validation @
- 2022 - 2024 Senior Manager - Silicon Engineering @
- 2020 - 2022 Hardware Engineer @
- 2013 - 2020 sr. staff engineer and manager @
- 2007 - 2013 Staff Test Development Engineer @
- 2001 - 2007 Senior Test Development Engineer @ Agere Systems
- 2000 - 2001 Test Engineer @ Lucent Technologies
Deepak Asnani Education
- Penn State University
Masters (Systems Engineering)
2010 - 2012 - Penn State University
BSEE (Electrical Engineering)
1994 - 2000
Deepak Asnani Skills
- IC
- ASIC
- Semiconductors
- Debugging
- Test Engineering
- SoC
- Electrical Engineering
- Unix
- Electronics
- Linux
- Verigy 93K
- Advantest T2000
- Leadership
- SerDes debug
- SerDes characterization
- Testing
- Failure Analysis
- Cross-functional Team Leadership
- Microsoft Word
- Telecommunications
- Cross Functional Team Leadership
- Development
- Business Development
- JavaScript
- Engineering
- Integrated Circuits Ic
- Project Management
- Test Development
- Java
- Application Specific Integrated Circuits Asic
- Manufacturing
- Integrated Circuits
- Application Specific Integrated Circuits
Deepak Asnani Summary
- Deepak Asnani, based in Oakland, CA, US, is currently a Senior Director Post Silicon Validation at NVIDIA. Deepak Asnani brings experience from previous roles at Groq, Google and Qualcomm. Deepak Asnani holds a 2010 - 2012 Masters in Systems Engineering @ Penn State University. With a robust skill set that includes IC, ASIC, Semiconductors, Debugging, Test Engineering and more. Deepak Asnani has 3 emails and 1 mobile phone numbers on RocketReach.
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