Christopher See Email
Hardware Design Engineer @ Cadence Design Systems
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Christopher See Location
- San Jose, CA, US
Christopher See Work
- Hardware Design Engineer @ (April 2020 - Present)
- Hardware Design Engineer @ (August 2019 - March 2020)
- Hardware Design Engineer @ (February 2018 - August 2019)
- Hardware Design Engineer @ (February 2014 - February 2018)
- Intern - Advanced Development, Circuit Layout @ (June 2012 - August 2012)
- Intern - Prototype Verification @ (June 2010 - August 2010)
Christopher See Education
- Columbia University
Master of Science (M.S.) (Electrical Engineering)
2012-2013 - Columbia University
Bachelor of Science (B.S.) (Electrical Engineering)
2008-2012 - The Bishop's School
High School Diploma
2002-2008
Christopher See Skills
- Application-Specific Integrated Circuits (ASIC)
- AutoCAD
- EDA
- Maya
- Model-view-viewmodel (MVVM)
- PHP
- PTC Pro/Engineer
- Perl
- Physical Design
- Python
- Swift (Programming Language)
- TCL
- Very-Large-Scale Integration (VLSI)
- Development
- Analog Circuit Design
- LTSpice
- Dreamweaver
- Photoshop
- DaVinci Resolve
- Design For Test Dft
- Verilog
- Cadence
- Microsoft Office
- Java
- Microsoft Publisher
- C++
- Microsoft Project
- Ksh
- Linux Suse
- Linux Ubuntu
- Very Large Scale Integration Vlsi
- Electronic Design Automation Eda
- Very Large Scale Integration
- Electronic Design Automation
- Design for Test
Christopher See Summary
- Christopher See, based in San Jose, CA, US, is currently a Hardware Design Engineer at Cadence Design Systems. Christopher See brings experience from previous roles at IBM and Teradata. Christopher See holds a 2012 - 2013 Master of Science (M.S.) in Electrical Engineering @ Columbia University. With a robust skill set that includes Application-Specific Integrated Circuits (ASIC), AutoCAD, EDA, Maya, Model-view-viewmodel (MVVM) and more. Christopher See has 1 emails on RocketReach.
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