Abilash J Email
Lead Design Engineer @ Cadence Design Systems
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Abilash J Location
- Bengaluru, KA, IN
Abilash J Work
- 2023 -now Lead Design Engineer @
- 2022 -2023 Design Engineer - 2 @
- 2021 -2022 VLSI Project Engineer @
- 2019 -2021 Design Verification Engineer @
- 2018 -2019 Design Verification Trainee @
Abilash J Education
- K S Institute of Technology, BANGALORE
Bachelor's degree (Electronics and Communication Engineering)
2014-2018
Abilash J Skills
- Universal Verification Methodology (UVM)
- SystemVerilog
- Perl
- RTL Coding
- RTL Design
Abilash J Summary
- Abilash J, based in Bengaluru, KA, IN, is currently a Lead Design Engineer at Cadence Design Systems. Abilash J brings experience from previous roles at Cadence Design Systems, Wipro, Blueberry Semiconductors Pvt Ltd. and Maven Silicon. Abilash J holds a 2014 - 2018 Bachelor's degree in Electronics and Communication Engineering @ K S Institute of Technology, BANGALORE. With a robust skill set that includes Universal Verification Methodology (UVM), SystemVerilog, Perl, RTL Coding, RTL Design and more. Abilash J has 2 emails on RocketReach.
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