Vissu K Email
ASIC Verification Engineer @ PerfectVIPs
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Vissu K Location
- Andhra Pradesh, India
Vissu K Work
- ASIC Verification Engineer @ (May 2013 - Present)
- Design and Verification Engineer course @ (November 2012 - February 2013)
- student @ (July 2010 - May 2012)
Vissu K Education
- Gitam Institute of Technology
Master of Technology (M.Tech.) (VLSI DESIGN)
2010-2012 - swarnandhra college of engineering and technology
Bachelor of Technology (BTech) (E.C.E)
2005-2009
Vissu K Skills
- SystemVerilog
- UVM
- ASIC
- Cadence Virtuoso
- Xilinx ISE
- FPGA
- VLSI
- Verilog
- Open Verification Methodology
- Verification Languages
- Cadence
- C
- ModelSim
- Digital IC Design
- System Verilog
- Digital Designs
- Functional Verification
- OVM
- RTL design
Vissu K Summary
- Vissu K, based in Andhra Pradesh, India, is currently a ASIC Verification Engineer at PerfectVIPs. Vissu K brings experience from previous roles at Maven Silicon and GITAM University. Vissu K holds a 2010 - 2012 Master of Technology (M.Tech.) in VLSI DESIGN @ Gitam Institute of Technology. With a robust skill set that includes SystemVerilog, UVM, ASIC, Cadence Virtuoso, Xilinx ISE and more. Vissu K has 1 emails on RocketReach.
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