Parthav Vyas Email
Senior Verification Lead @ PerfectVIPs
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Parthav Vyas Location
- Ahmedabad, GJ, IN
Parthav Vyas Work
- 2013 -now Senior Verification Lead @
- 2009 -2013 Senior Dv Consultant @
- 2006 -2013 Member of Technical Staff @
Parthav Vyas Education
- Dharamsinh Desai University
Master Of Engineering (Electronics, Engineering, Communications)
2004-2006 - S.V.I.T, Gujarat University
Bachelor Of Engineering (Electronics, Engineering, Communications)
1999-2003
Parthav Vyas Skills
- VLSI
- SystemVerilog
- Open Verification Methodology
- UVM
- Functional Verification
- C++
- FPGA
- Verilog
- ModelSim
- SoC
- VHDL
- Embedded Systems
- Open NAND Flash Interface
- IEEE 802.11
- IEEE 802.3bj RS-FEC
Parthav Vyas Summary
- Parthav Vyas, based in Ahmedabad, GJ, IN, is currently a Senior Verification Lead at Perfectvips. Parthav Vyas brings experience from previous roles at Rockwell Collins and Einfochips. Parthav Vyas holds a 2004 - 2006 Master Of Engineering in Electronics, Engineering, Communications @ Dharamsinh Desai University. With a robust skill set that includes VLSI, SystemVerilog, Open Verification Methodology, UVM, Functional Verification and more. Parthav Vyas has 2 emails on RocketReach.
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Parthav Vyas
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