Vipul Sinha Email & Phone Number
ASIC Design Engineer @ Broadcom
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Vipul Sinha Location
- Colorado Springs, CO, US
Vipul Sinha Work
- 2013 -now ASIC Design Engineer @
- 2012 -2013 ASIC Design Engineer @
- 2011 -2012 ASIC Design Engineer @
- 2010 -2011 ASIC Design Engineer @
- 2010 -2010 ASIC design Engineer Synopsys Finland @
- 2008 -2009 Sr. Engineer @
- 2007 -2008 Sr.Engineer @
- 2000 -2007 Team Leader @
Vipul Sinha Education
- Purdue University
MS Certification (Machine learning Artificial intelligence)
2022-2023 - Delhi College of Engineering
M.Tech (Computer Science Engineering)
1999-2000 - Purdue University Daniels School of Business
Master of Business Administration - MBA (Organizational Leadership, Business Analytics)
- Purdue University Daniels School of Business
Bachelor's degree (Business Analylics)
- Purdue University Daniels School of Business
Bachelor's degree (Organizational Leadership, Change management and Negotiation)
- The Ohio State University
Master of Science - MS (Electrical and Electronics Engineering)
- Jamia Millia Islamia
Master of Science - MS (Electronics)
Vipul Sinha Skills
- System Verilog
- Multimedia
- Error Correction
- BCH
- MIcro Architecture
- RTL Coding
- High-speed Digital Design
- Low Power Design
- RAID
- ASIC
- RTL design
- VHDL
- VLSI
- Verilog
- FPGA
- PCIe
- Functional Verification
- Low-power Design
- SystemVerilog
- Logic Synthesis
- Debugging
- Digital Signal Processing
- RTL verification
- Timing Closure
- Integrated Circuit Design
- NCSim
- Spyglass
- Formal Verification
- Very-Large-Scale Integration (VLSI)
- Field-Programmable Gate Arrays (FPGA)
- Application-Specific Integrated Circuits (ASIC)
- CDC
- Static Timing Analysis
- Digital Signal Processors
- OVM/UVM
- VCS
- ARM
- SoC
- Veritas Cluster Server
- Ecological Network
- Power
- Field Programmable Gate Arrays Fpga
- Biodiversity
- Telecommunications
- Conservation
- Application Specific Integrated Circuits Asic
- Design
- Very Large Scale Integration Vlsi
- Nature
- Asic Design
- Sustainable Development
- Application Specific Integrated Circuits
- Very Large Scale Integration
- Field Programmable Gate Arrays
Vipul Sinha Summary
- Vipul Sinha, based in Colorado Springs, CO, US, is currently a ASIC Design Engineer at Broadcom. Vipul Sinha brings experience from previous roles at Qualcomm, Texas Instruments, PMC-Sierra and Synopsys. Vipul Sinha holds a 2022 - 2023 MS Certification in Machine learning Artificial intelligence @ Purdue University. With a robust skill set that includes System Verilog, Multimedia, Error Correction, BCH, MIcro Architecture and more. Vipul Sinha has 3 emails and 3 mobile phone numbers on RocketReach.
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