Tom Doan Email & Phone Number
Senior Failure Analysis Engineer @ NVIDIA
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Tom Doan Location
- Santa Clara, CA, US
Tom Doan Work
- Senior Failure Analysis Engineer @ (October 2024 - Present)
- Staff Hardware Engineer, Silicon Failure Analysis @ (May 2016 - October 2024)
- Senior Product Test Engineer @ (February 2013 - April 2016)
- Product Development Engineer @ (August 2008 - February 2013)
Tom Doan Education
- Georgia Institute of Technology
MSECE (Electrical/Computer Engineering)
2006-2008 - Georgia Institute of Technology
BSEE (Electrical/Computer Engineering)
2002-2006
Tom Doan Skills
- ATE
- Analog
- Analog Circuit Design
- Analog Design
- C
- C++
- CMOS
- Cadence
- Cadence Virtuoso
- Characterization
- Circuit Design
- DDR3
- DFT
- DSP
- Debugging
- Digital Design
- Digital Electronics
- EDA
- Electrical Engineering
- FPGA
- HSIO/DDR Analog mixed signal IP validation and characterization
- I/O
- IC
- Integrated Circuit Design
- Java
- Labview
- Linux
- MathCAD
- Matlab
- Microprocessors
- Mixed Signal
- PCB design
- PLL
- Perl
- Post silicon debug characterization and validation
- Processors
- Pspice
- RF
- SOC Technical lead
- Semiconductor Failure Analysis
- Semiconductors
- Signal Integrity
- Silicon
- Simulation
- Spectre
- Testing
- Unix
- VLSI
- Verilog
- Windows
- electrical failure analsyis
Tom Doan Summary
- Tom Doan, based in Santa Clara, CA, US, is currently a Senior Failure Analysis Engineer at NVIDIA. Tom Doan brings experience from previous roles at Qualcomm and AMD. Tom Doan holds a 2006 - 2008 MSECE in Electrical/Computer Engineering @ Georgia Institute of Technology. With a robust skill set that includes ATE, Analog, Analog Circuit Design, Analog Design, C and more. Tom Doan has 5 emails and 11 mobile phone numbers on RocketReach.
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