Tom Burton Location
Beaverton, OR, US
Tom Burton Work
- 2020 - now Sr Director of Product Development @ Parade Technologies, Inc.
- 2009 - 2020 VP of Engineering @ Fresco Logic
- 2001 - 2009 Senior ASIC Engineer @ Brocade
- 2001 - 2004 Design Engineer @ Sanera Systems
- 1998 - 2001 Senior ASIC Engineer @ Intel Corporation
- 1996 - 1998 Field Application Engineer @ Altera
- 1986 - 1996 Design Engineer @ American Microsystems, Inc (AMI)
Tom Burton Education
- Minnesota State University, Mankato
BS EET
1982 - 1986
Tom Burton Skills
- PCIe
- RTL design
- USB
- Verilog
- Ethernet
- ASIC
- Fibre Channel
- C
- FPGA
- Xilinx
Tom Burton Summary
Tom Burton, based in Beaverton, OR, US, is currently a Sr Director of Product Development at Parade Technologies, Inc.. Tom Burton brings experience from previous roles at Fresco Logic, Brocade, Sanera Systems and Intel. Tom Burton holds a 1982 - 1986 BS EET @ Minnesota State University, Mankato. With a robust skill set that includes PCIe, RTL design, USB, Verilog, Ethernet and more. Tom Burton has 2 emails and 2 mobile phone numbers on RocketReach.
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