Todd Westervelt Email & Phone Number
ASIC Design Engineer @ Marvell India
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Todd Westervelt Location
- Stowe, VT, US
Todd Westervelt Work
- 2019 -now ASIC Design Engineer @
- 2015 -2019 ASIC Design Engineer @
- 1998 -2015 ASIC Design Center and Application Engineer @
- 1991 -2011 circuit design @
- 1988 -1998 ASIC Library, Design System, Prototype chip Engineer @ International Business Machines
Todd Westervelt Education
- The University of Connecticut 1985-1988
- University of Hartford
ASEET, Electrical and Electronics Engineering (Electrical and Electronics Engineering)
1982-1985 - University of Vermont
Todd Westervelt Skills
- Hardware Architecture
- Logic Design
- Cadence Virtuoso
- Signal Integrity
- Floorplanning
- Computer Architecture
- Debugging
- Functional Verification
- RTL design
- Microprocessors
- Processors
- ASIC
- VLSI
- Verilog
- Integrated Circuit Design
- Cadence
- TCL
- Circuit Design
- Hardware Design
- CMOS
- Testing
- FPGA
- I/O
- SoC
- VHDL
- EDA
- Timing Closure
- SystemVerilog
- Semiconductors
- Physical Design
- Static Timing Analysis
- IC
Todd Westervelt Summary
- Todd Westervelt, based in Stowe, VT, US, is currently a ASIC Design Engineer at Marvell Semiconductor. Todd Westervelt brings experience from previous roles at GLOBALFOUNDRIES, IBM and International Business Machines. Todd Westervelt holds a 1985 - 1988 The University of Connecticut. With a robust skill set that includes Hardware Architecture, Logic Design, Cadence Virtuoso, Signal Integrity, Floorplanning and more. Todd Westervelt has 1 emails and 1 mobile phone numbers on RocketReach.
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