Tian Yang Email & Phone Number
Director - AI for chip design @ NVIDIA
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Tian Yang Location
- Santa Clara, CA, US
Tian Yang Work
- 2025 -now Director - AI for chip design @
- 2015 -2024 Principal Engineer in Deep Learning Application @
- 2008 -2014 physical design engineer @
- 2005 -2006 ASIC design engineer @
Tian Yang Education
- Stanford University
Non-degree (Artificial Intelligence)
2014-2016 - Purdue University
Master (Electrical Engineer)
2006-2007 - National University of Singapore
Master (Microelectronics)
2003-2005 - Fudan University
BS (Microelectronics)
1999-2003 - Gezhi
Tian Yang Skills
- EDA
- ASIC
- IC
- Physical Design
- Primetime
- RTL design
- SoC
- Static Timing Analysis
- TCL
- Timing Closure
- VLSI
- Verilog
- CMOS
- Cadence Virtuoso
- Debugging
- Embedded Systems
- Low-power Design
- Semiconductors
- Computer Hardware
- Design
- Low Power Design
- Asic Design
Tian Yang Summary
- Tian Yang, based in Santa Clara, CA, US, is currently a Director - AI for chip design at NVIDIA. Tian Yang brings experience from previous roles at NVIDIA and Agere Systems. Tian Yang holds a 2014 - 2016 Non-degree in Artificial Intelligence @ Stanford University. With a robust skill set that includes EDA, ASIC, IC, Physical Design, Primetime and more. Tian Yang has 4 emails and 11 mobile phone numbers on RocketReach.
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