Teena Saini's Location

San Jose, CA, US

Teena Saini's Work

Teena Saini's Education

  • Y.M.C.A UNIVERSITY OF SCIENCE AND TECHNOLOGY, FARIDABAD HARYANA

    Bachelor of Technology (B.Tech.) (Electronics and Communication Engineering; SCIENCE AND TECHNOLOGY)

    2007 - 2011

Teena Saini's Skills

  • Basic knowledge of Verilog, C and Tcl
  • Hands on experience with Cadence RTL Compiler , Encounter Test ATPG tool
  • SoC
  • Compilers
  • VHDL
  • ATPG
  • Testing
  • Cadence
  • EDA
  • Test Planning

Teena Saini's Summary

Teena Saini, based in San Jose, CA, US, is currently a Principal Product Engineer at Cadence Design Systems, bringing experience from previous roles at Cadence Design Systems and Qualcomm. Teena Saini holds a 2007 - 2011 Bachelor of Technology (B.Tech.) in Electronics and Communication Engineering; SCIENCE AND TECHNOLOGY @ Y.M.C.A UNIVERSITY OF SCIENCE AND TECHNOLOGY, FARIDABAD HARYANA. With a robust skill set that includes Basic knowledge of Verilog, C and Tcl, Hands on experience with Cadence RTL Compiler , Encounter Test ATPG tool, SoC, Compilers, VHDL and more, Teena Saini contributes valuable insights to the industry. Teena Saini has 2 emails on RocketReach.

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