Suresh Chellappa Email & Phone Number
Principal Engineer @ Broadcom
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Suresh Chellappa Location
- Irvine, CA, US
Suresh Chellappa Work
- Principal Engineer @ (February 2012 - Present)
- ASIC Verification Consultant from Synapse Design Automation @ (July 2011 - February 2012)
- ASIC Verification Consultant from Synapse Design Automation @ (November 2010 - June 2011)
- Component Design Engineer @ (December 2008 - October 2010)
- ASIC Verification Consultant from Vinchip Systems Inc @ (March 2006 - November 2008)
- ASIC Verification Consultant from Vinchip Systems Inc @ General Atomics (November 2005 - February 2006)
- Junior Verification Engineer @ Vinchip Systems Inc (June 2003 - October 2005)
Suresh Chellappa Education
- UC San Diego
Certificate course (Signals and Systems)
2008-2008 - Anna University Chennai
Master of Engineering (Applied Electronics)
2001-2002 - Bharathiar University
Bachelor's Degree (Electrical and Electronics)
1997-2001
Suresh Chellappa Skills
- SystemVerilog
- Verilog
- ASIC
- SoC
- FPGA
- VHDL
- AMBA AHB
- Specman
- UVM
- PCIe
- USB
- DFT
- Ethernet
- EDA
- ModelSim
- VLSI
- Open Verification Methodology
- NCSim
- Debugging
- Integrated Circuit Design
- Customer Service
- Microsoft Office
- Intel
- Verification
- Microsoft Excel
- Java
- Design
- Computing
- System on a Chip Soc
- Component Design
- SAN
- Engineering
- Semiconductors
- System on a Chip
Suresh Chellappa Summary
- Suresh Chellappa, based in Irvine, CA, US, is currently a Principal Engineer at Broadcom. Suresh Chellappa brings experience from previous roles at Qualcomm, Broadcom, Intel and Texas Instruments. Suresh Chellappa holds a 2008 - 2008 Certificate course in Signals and Systems @ UC San Diego. With a robust skill set that includes SystemVerilog, Verilog, ASIC, SoC, FPGA and more. Suresh Chellappa has 2 emails and 2 mobile phone numbers on RocketReach.
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