1993 -1995 ASIC Designer @ Oki Semiconductor America
Steven Loi Education
California State University-Sacramento
BS, EE
Steven Loi Skills
FPGA
Debugging
RTOS
SoC
Embedded Systems
ASIC
Video Compression
H.264
Signal Processing
Embedded Software
Semiconductors
Verilog
ARM
Device Drivers
Firmware
Management
SQL
Illustrator
Engineering
Graphic Design
Steven Loi Summary
Steven Loi, based in San Jose, CA, US, is currently a Staff FPGA Design Engineer at Kateeva. Steven Loi brings experience from previous roles at Microsoft, Kateeva, EFI and Sigma Designs. Steven Loi holds a BS, EE @ California State University-Sacramento. With a robust skill set that includes FPGA, Debugging, RTOS, SoC, Embedded Systems and more. Steven Loi has 2 emails and 1 mobile phone numbers on RocketReach.
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