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Steve Glaser Location
Santa Clara, CA, US
Steve Glaser Work
Principal Engineer @ (February 2012 - Present)
Board Member @ (April 2020 - Present)
Fellow @ (June 2008 - January 2012)
Senior Member of the Technical Staff @ NextIO Inc (August 2004 - June 2008)
Staff Engineer @ (April 2003 - August 2004)
MTS @ Paceline Systems (January 2001 - January 2003)
MTS @ Avici (January 1996 - January 2001)
MTS @ DEC (August 1986 - June 1997)
Project Lead @ (October 1985 - August 1986)
Engineer @ (January 1977 - January 1985)
Steve Glaser Education
Rice University
BA (Elec Engineering & Applied Mathematics)
1972-1977
Steve Glaser Skills
Cache Coherency
Software Development
Python (Programming Language)
Interconnect
C++
Virtualization
Microprocessors
Device Drivers
Hardware Design
ASIC
System Architecture
I/O
Software Design
PCIe
Network Architecture
Hardware Architecture
Infiniband
Processors
Hardware
Verilog
SystemVerilog
Computer Architecture
Distributed Systems
Debugging
RTL design
SoC
FPGA
Firmware
EDA
ARM
Microarchitecture
X86
Computer Hardware
SAN
Steve Glaser Summary
Steve Glaser, based in Santa Clara, CA, US, is currently a Principal Engineer at NVIDIA. Steve Glaser brings experience from previous roles at PCI-SIG, AMD, NextIO Inc and Sun. Steve Glaser holds a 1972 - 1977 BA in Elec Engineering & Applied Mathematics @ Rice University. With a robust skill set that includes Cache Coherency, Software Development, Python (Programming Language), Interconnect, C++ and more. Steve Glaser has 1 emails and 1 mobile phone numbers on RocketReach.
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