Sowmya Garg's Location

San Jose, California, United States

Sowmya Garg's Work

  • Senior Design Engineer (Physical Design) @ TSMC
  • Physical Design Engineer @ TSMC
  • Physical Design Intern @ Qualcomm

Sowmya Garg's Education

  • Columbia University in the City of New York

    Master's degree (Electrical and Electronics Engineering)

    2018 - 2019
  • SRM University

    Bachelor of Technology (BTech) (Electrical, Electronics and Communications Engineering)

    2013 - 2017
  • Massachusetts Institute of Technology

    Special Student (Electrical Engineering and Computer Science (EECS))

    2015 - 2016

Sowmya Garg's Skills

  • Leadership
  • Cadence Virtuoso
  • Layout Design
  • Floorplanning
  • System on a Chip
  • Very Large Scale Integration
  • Matlab
  • Design Rule Checking
  • Timing
  • Placement and Route

Sowmya Garg's Summary

Sowmya Garg, based in San Jose, California, United States, is currently a Senior Design Engineer (Physical Design) at TSMC, bringing experience from previous roles at TSMC, Qualcomm, Columbia University in the City of New York and Entrench Electronics. Sowmya Garg holds a 2018 - 2019 Master's degree in Electrical and Electronics Engineering @ Columbia University in the City of New York. With a robust skill set that includes Leadership, Cadence Virtuoso, Layout Design, Floorplanning, System on a Chip and more, Sowmya Garg contributes valuable insights to the industry. Sowmya Garg has 2 emails and 4 mobile phone numbers on RocketReach.

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