Shane Bell's Location
Boston, MA, US
Shane Bell's Work
- PD lead/Principal Engineer @ Cisco
- Pd Lead @ Acacia Communications, now part of Cisco
- Physical Design Lead @ EZchip
- Physical Design Lead @ Tilera Corporation
- SMTS @ AMD
- Senior Staff Engineer @ Intel Corporation
- MTS @ Hewlett Packard Enterprise
Shane Bell's Education
- University Of Massachusetts - Amherst
Bachelor Of Science (Computer Engineering)
1988 - 1992
Shane Bell's Skills
- SoC
- Physical Design
- Microprocessors
- Timing Closure
- Static Timing Analysis
- Semiconductors
- ASIC
- IC
- Processors
- VLSI
Shane Bell's Summary
Shane Bell, based in Boston, MA, US, is currently a PD lead/Principal Engineer at Cisco, bringing experience from previous roles at Acacia Communications Inc., Ezchip, Tilera Corporation and Amd. Shane Bell holds a 1988 - 1992 Bachelor Of Science in Computer Engineering @ University Of Massachusetts - Amherst. With a robust skill set that includes SoC, Physical Design, Microprocessors, Timing Closure, Static Timing Analysis and more, Shane Bell contributes valuable insights to the industry. Shane Bell has 5 emails on RocketReach.
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