Shane Bell Email & Phone Number
PD lead/Principal Engineer @ Cisco
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Shane Bell Location
- Boston, MA, US
Shane Bell Work
- PD lead/Principal Engineer @ (April 2021 - Present)
- Pd Lead @ (February 2016 - April 2021)
- Physical Design Lead @ (November 2014 - February 2016)
- Physical Design Lead @ (December 2005 - November 2014)
- SMTS @ (March 2004 - December 2005)
- Senior Staff Engineer @ (August 2001 - March 2004)
- MTS @ (January 1998 - January 2001)
Shane Bell Education
- University Of Massachusetts - Amherst
Bachelor Of Science (Computer Engineering)
1988-1992
Shane Bell Skills
- Static Timing Analysis
- RTL design
- SoC
- ASIC
- Custom Circuits
- P&R
- Microprocessors
- Perl
- TCL
- GNU Make
- IC
- Timing Closure
- Microarchitecture
- Processors
- Low-power Design
- Physical Design
- EDA
- Computer Architecture
- Verilog
- VLSI
- Logic Design
- Debugging
- Primetime
- DFT
- PCIe
- Integrated Circuit Design
- Logic Synthesis
- CMOS
- Cadence Virtuoso
- Circuit Design
- DRC
- LVS
- Place & Route
- RTL coding
- SPICE
- Semiconductors
- Physical Verification
- Hardware Architecture
- Floorplanning
- Functional Verification
- ARM
- System on a Chip (SoC)
Shane Bell Summary
- Shane Bell, based in Boston, MA, US, is currently a PD lead/Principal Engineer at Cisco. Shane Bell brings experience from previous roles at Acacia Communications Inc., Ezchip, Tilera Corporation and Amd. Shane Bell holds a 1988 - 1992 Bachelor Of Science in Computer Engineering @ University Of Massachusetts - Amherst. With a robust skill set that includes Static Timing Analysis, RTL design, SoC, ASIC, Custom Circuits and more. Shane Bell has 2 emails and 1 mobile phone numbers on RocketReach.
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