Salil Rajarshi's Location
San Jose, CA, US
Salil Rajarshi's Work
Salil Rajarshi's Education
University of Southern California
Master of Science (MS) (Electrical and Electronics Engineering)
2013 - 2015
University of Pune
Bachelor of Engineering (B.E.) (Electrical, Electronics and Communications Engineering)
2008 - 2012
Salil Rajarshi's Skills
Salil Rajarshi's Summary
Salil Rajarshi, based in San Jose, CA, US, is currently a ASIC Physical Design Engineer at Juniper Networks, bringing experience from previous roles at Cadence Design Systems, Intel Corporation and SanDisk. Salil Rajarshi holds a 2013 - 2015 Master of Science (MS) in Electrical and Electronics Engineering @ University of Southern California. With a robust skill set that includes Synopsys Ic Compiler, Synopsys Primetime, Cadence Conformal Lec, Verilog, Synopsys Design Compiler and more, Salil Rajarshi contributes valuable insights to the industry. Salil Rajarshi has 2 emails and 1 mobile phone number on RocketReach.