Srishail Upadhye Email & Phone Number

Srishail Upadhye, based in Cupertino, CA, US, is currently a Physical Design - Timing Analysis Engineer at Apple, bringing experience from previous roles at Apple, Seagate Technology, LSI, an Avago Technologies Company and LSI Corporation. Srishail Upadhye holds a 2014 - 2016 Master's Degree in Integrated Circuit Design @ Arizona State University. With a robust skill set that includes Field Programmable Gate Arrays Fpga, C, System On A Chip Soc, System Verilog, Perl and more, Srishail Upadhye contributes valuable insights to the industry. Srishail Upadhye has 2 emails on RocketReach.