Sahil Bhat Email
Verification Engineer @ NVIDIA
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Sahil Bhat Location
- Santa Clara, CA, US
Sahil Bhat Work
- Verification Engineer @ (June 2024 - Present)
- Design Verification Engineer @ (May 2023 - December 2023)
- Intern @ (December 2021 - April 2022)
- Verification Engineer @ (June 2020 - February 2021)
- Verification Engineer-contract @ (July 2020 - December 2020)
Sahil Bhat Education
- North Carolina State University
Master of Science - MS (Computer Engineering)
2022-2024 - Visvesvaraya Technological University
Bachelor of Engineering - BE (Electrical, Electronics and Communications Engineering)
2015-2019
Sahil Bhat Skills
- Application-Specific Integrated Circuits (ASIC)
- Assertion Based Verification
- Assertions
- C++
- Computer Architecture
- Digital Electronics
- Functional Verification
- Microarchitecture
- PCB design
- RTL Coding
- RTL Design
- SystemVerilog
- Universal Verification Methodology (UVM)
- Verilog
- c
- cadence
- embedded c
Sahil Bhat Summary
- Sahil Bhat, based in Santa Clara, CA, US, is currently a Verification Engineer at NVIDIA. Sahil Bhat brings experience from previous roles at Renesas Electronics, Tequed Labs, SmartSoC Solutions Pvt Ltd and AMD. Sahil Bhat holds a 2022 - 2024 Master of Science - MS in Computer Engineering @ North Carolina State University. With a robust skill set that includes Application-Specific Integrated Circuits (ASIC), Assertion Based Verification, Assertions, C++, Computer Architecture and more. Sahil Bhat has 2 emails on RocketReach.
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