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Ryan Zhu Location
California, United States
Ryan Zhu Work
2026 -now Principal DFX Methodology Engineer @
2022 -2026 Senior DFX Methodology Engineer @
2018 -2022 Senior DFT Engineer @
2014 -2018 Staff Design Engineer @
2013 -2014 Senior Design Engineer @
2008 -2013 Senior ASIC Design Engineer @
Ryan Zhu Education
University of Rochester
MS ( Electrical Engineering )
2005-2007
East China Normal University
BS ( Electrical Engineering )
Ryan Zhu Skills
SoC
ASIC
DFT
Semiconductors
FPGA
Algorithms
ARM Architecture
Debugging
Testing
System on a Chip (SoC)
Field-Programmable Gate Arrays (FPGA)
python
Verilog
Embedded Systems
C
Java
Static Timing Analysis
Integrated Circuit Design
Logic Synthesis
Timing Closure
SystemVerilog
Functional Verification
Python (Programming Language)
System on a Chip
Field Programmable Gate Arrays
Ryan Zhu Summary
Ryan Zhu, based in California, United States, is currently a Principal DFX Methodology Engineer at NVIDIA. Ryan Zhu brings experience from previous roles at NVIDIA, Marvell Semiconductor and Altera. Ryan Zhu holds a 2005 - 2007 MS in Electrical Engineering @ University of Rochester . With a robust skill set that includes SoC, ASIC, DFT, Semiconductors, FPGA and more. Ryan Zhu has 4 emails and 1 mobile phone numbers on RocketReach.
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