Rupa Nagar Email & Phone Number

Sr. Technical Program Manager @ NVIDIA

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Rupa Nagar Location

Sacramento, CA, US

Rupa Nagar Work

Sr. Technical Program Manager @ (July 2026 - Present)
Senior Professional Program Manager @ (August 2025 - June 2026)
Platform Program Manager @ (August 2022 - January 2025)
Technical Software Program Manager @ (February 2017 - July 2022)
Sr. Hardware Program Manager - Complete System Integration @ (May 2016 - February 2017)
Technical Software Program Manager @ (August 2014 - December 2015)
Technical Software Project Manager @ GE Oil & Gas (January 2014 - January 2015)
Multicore SOC AVV Project Manager, Embedded Processing @ (January 2010 - August 2014)
Multicore SOC System AVV Project(s) Lead @ (January 2008 - January 2010)
DSP Application Validation and Verification (AVV) Lead @ (January 2003 - January 2008)
Applications Engineer @ (January 2000 - January 2003)
Emulator Engineer—Software Development Organization @ (October 1995 - December 2000)
Stafford, TX @ (January 1992 - January 1995)

Rupa Nagar Education

University of Houston-Clear Lake
Bachelor of Engineering (Computer System Design)

Rupa Nagar Skills

Agile Methodologies
Bios
Facilitation
Attention to Detail
SoC
Semiconductors
Embedded Systems
ASIC
IC
Debugging
Functional Verification
Embedded Software
Firmware
System Testing
Project Management
FPGA
ARM
TI DSPs
Test Automation
Resource Management
Software Project Management
Risk Management
Emulation
Digital Signal Processors
Project / Program Management
Global Team Management
Cross-functional Leadership
Strategic Project Planning and Implementation
Requirements and Process Management
Collaborative Relations
Application Validation and Verification
Continuous Systems Improvement
Programming Languages: VHDL, C, C++, DirectC, Embedded C, x86 Assembly, Perl
DSP Chips: Texas Instruments C2xxx/C54x/C55/C64x/C66xx Chip Families
Motorola 24-Bit Fixed Point and Floating Point DSPs, C66xx Core, A15 Core
Software Development Tools: Microsoft Project 2013
Microsoft Office Suite (PowerPoint, Excel, and Word)
Rally, Cope Composer Studio, Microsoft Visual Studio, GCC
Testing and Measuring Equipment: TI CCS Simulator and Emulators, Trace32, JTAP
Oscilloscopes, Logic Analyzer. Protocol Analyzers
Management
Program Management
Cross-functional Team Leadership
Integrated Circuits (IC)
System on a Chip (SoC)
Application-Specific Integrated Circuits (ASIC)
Field-Programmable Gate Arrays (FPGA)
ARM Architecture
Communication
Leadership
Agile & Waterfall Methodologies
Artificial Intelligence for Business
Global Cross-Functional Team Leadership
Product Delivery
Project Team Management
Software Development Life Cycle (SDLC)
Ti Ccs Simulator And Emulators
Microsoft Office Suite Powerpoint
Cross Functional Leadership
C
GCC
Perl
Directc
Cope Composer Studio
Logic Analyzer. Protocol Analyzers
Rally
Excel
Jtap
Strategic Planning
Software Development Tools
Engineering
Oscilloscopes
Mixed Signal
Embedded C
Testing And Measuring Equipment
Testing
Microsoft Excel
VHDL
C++
Microsoft Visual Studio
Motorola 24 Bit Fixed Point And Floating Point Dsps
Dsp Chips
Project
C66Xx Core
Trace32
x86 Assembly
Software Development
Word
Programming Languages
Microsoft Project 2013
A15 Core
Field Programmable Gate Arrays Fpga
Cross Functional Team Leadership
Integration
System on a Chip Soc
JavaScript
Application Specific Integrated Circuits Asic
Integrated Circuits Ic
Microsoft Office Suite
Integrated Circuits
System on a Chip
Application Specific Integrated Circuits
Field Programmable Gate Arrays

Rupa Nagar Summary

Rupa Nagar, based in Sacramento, CA, US, is currently a Sr. Technical Program Manager at NVIDIA. Rupa Nagar brings experience from previous roles at Gainwell Technologies, Intel Corporation and Hewlett Packard Enterprise. Rupa Nagar holds a Bachelor of Engineering in Computer System Design @ University of Houston-Clear Lake. With a robust skill set that includes Agile Methodologies, Bios, Facilitation, Attention to Detail, SoC and more. Rupa Nagar has 2 emails and 2 mobile phone numbers on RocketReach.