Rohit Kandula's Location

Cupertino, CA, US

Rohit Kandula's Work

Rohit Kandula's Education

  • University of Michigan - Rackham Graduate School

    2018 - 2020
  • 1996 - 2006

Rohit Kandula's Skills

  • Verilog
  • Static Timing Analysis
  • Physical Design
  • VLSI
  • ASIC
  • C
  • TCL
  • Perl

Rohit Kandula's Summary

Rohit Kandula, based in Cupertino, CA, US, is currently a Senior Design Engineer at AMD, bringing experience from previous roles at Ampere, AppliedMicro, Texas Instruments India and Texas Instruments. Rohit Kandula holds a 2018 - 2020 University of Michigan - Rackham Graduate School. With a robust skill set that includes Verilog, Static Timing Analysis, Physical Design, VLSI, ASIC and more, Rohit Kandula contributes valuable insights to the industry. Rohit Kandula has 2 emails and 3 mobile phone numbers on RocketReach.

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