Rohit Chawda Location
- Cupertino, CA, US
Rohit Chawda Work
- 2021 - now Physical Design Manager @
- 2015 - 2021 Physical Design Engineer and Lead @
- 2015 - 2015 Physical Design Intern @
- 2014 - 2014 Research | Advisor: Dr. Jeffrey Draper @
- 2014 - 2014 Research | Advisor: Dr. Paul Bogdan @
- 2014 - 2014 Design Intern | R and D - Test Chip Design and Validation Division @
- 2014 - 2014 Course Grader @
- 2013 - 2014 Student Worker @
- 2010 - 2010 Project Trainee @ Electronics Corporation of India Limited
Rohit Chawda Education
- University of Southern California
Master of Science (MS) (Electrical Engineering - VLSI Design & Computer Architecture)
2013 - 2015 - Sir Padampat Singhania University
Bachelor of Technology (B.Tech.) (Electronics and Communications Engineering)
2008 - 2012 - FIITJEE Junior College
Intermediate (A.P. Board) (Physics, Chemistry, Maths, English & French)
2006 - 2008
Rohit Chawda Skills
- SoC
- Physical Design
- Static Timing Analysis
- Clock Tree Synthesis
- Verilog
- C
- C++
- Perl
- Python
- ASIC
- Timing Closure
- Place & Route
- RTL design
- Computer Architecture
- Verification
- FPGA
- Synopsys tools
- Cadence Virtuoso
- ModelSim
- VLSI
- Algorithms
- Cadence
- VHDL
- TCL
- Java
- Matlab
- Microcontrollers
- Microarchitecture
- Computer Vision
- Xilinx ISE
- Data Structures
- Signal Processing
- Machine Learning
- Logic Synthesis
- Embedded C
- Embedded Systems
- Programming
- Image Processing
- Xilinx
- Simulink
- Debugging
- Testing
- Robotics
- Integrated Circuit Design
- Digital Electronics
- Circuit Design
- Microprocessors
- Semiconductors
- Electrical Engineering
- Graph Theory
- Place And Route
- Design
Rohit Chawda Summary
- Rohit Chawda, based in Cupertino, CA, US, is currently a Physical Design Manager at Apple. Rohit Chawda brings experience from previous roles at Apple, Information Sciences Institute and University of Southern California. Rohit Chawda holds a 2013 - 2015 Master of Science (MS) in Electrical Engineering - VLSI Design & Computer Architecture @ University of Southern California. With a robust skill set that includes SoC, Physical Design, Static Timing Analysis, Clock Tree Synthesis, Verilog and more. Rohit Chawda has 2 emails and 1 mobile phone numbers on RocketReach.
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