Robert Inderst Email
Senior FPGA System Designer @ SVS-Vistek GmbH
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Robert Inderst Location
- Munich, BY, DE
Robert Inderst Work
- Senior FPGA System Designer @ (May 2020 - Present)
- Principal Hardware Engineer @ (October 2018 - April 2020)
- Senior Hardware Design Engineer @ (May 2013 - September 2018)
- Senior Hardware Design Engineer @ (April 2007 - April 2013)
- Hardwaredesign-Ingenieur @ (October 1992 - March 2007)
Robert Inderst Education
- Hochschule München
Dipl-Ing. (FH) (Elektrotechnik-Datentechnik)
1987-1992
Robert Inderst Summary
- Robert Inderst, based in Munich, BY, DE, is currently a Senior FPGA System Designer at SVS-Vistek GmbH. Robert Inderst brings experience from previous roles at Infinera, Coriant, Inc., Nokia and Siemens. Robert Inderst holds a 1987 - 1992 Dipl-Ing. (FH) in Elektrotechnik-Datentechnik @ Hochschule München. Robert Inderst has 1 emails on RocketReach.
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