Ran Shani Email
Sr. Manager Chip Design @ NVIDIA
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Ran Shani Location
- Israel
Ran Shani Work
- Sr. Manager Chip Design @ (May 2020 - Present)
- Sr. Manager Chip Design @ (May 2017 - April 2020)
- Manager Chip Design @ (December 2014 - April 2017)
- Sr. Chip design Engineer @ (February 2012 - November 2014)
- ASIC Chip Design Engineer @ (January 2011 - February 2012)
- FPGA logic designer @ (January 2008 - January 2011)
- FPGA Design Engineer @ (January 2007 - October 2008)
- Board Designer and FPGA Engineer, R and D @ Ministry of Defence (May 2004 - December 2006)
Ran Shani Education
- H.I.T - Holon institute of technology
BSc. (Electronic and Telecommunication)
2001-2005
Ran Shani Skills
- Ethernet
- IP
Ran Shani Summary
- Ran Shani, based in Israel, is currently a Sr. Manager Chip Design at NVIDIA. Ran Shani brings experience from previous roles at Mellanox Technologies. Ran Shani holds a 2001 - 2005 BSc. in Electronic and Telecommunication @ H.I.T - Holon institute of technology. With a robust skill set that includes Ethernet, IP and more. Ran Shani has 1 emails on RocketReach.
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